dut

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity multimux is
    Port ( X : in std_logic_vector( 3 downto 0);
        S : in std_logic_vector( 2 downto 0);
        Y : out std_logic );
        
end multimux;

architecture Behavioral of multimux is

procedure mux(signal x : in std_logic_vector(1 downto 0); signal s : in std_logic; signal Y : out std_logic) is
begin
    if s = '0' then
        y <= x(0);
    else
        y<= x(1);
    end if;
end procedure;

signal F : std_logic_vector( 1 downto 0 );

begin

process(x, s)

begin
mux(x(1 downto 0), s(0), f(0));
mux(x(3 downto 2), s(1), f(1));
mux(f, s(2), y);
end process;

end Behavioral;

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